As the wire width and wire height of a metal wire which has been miniaturized and thinned for a leading-edge device are closer to the mean free path of a conduction electron, the increase in electrical resistivity due to electronic interface inelastic scattering becomes more prominent. For example, copper (Cu) used as a low-resistance wire material for a leading-edge device has a mean free path of a conduction electron of approximately 40 nm; as the wire width and wire height get closer to 40 nm, the electrical resistivity increases. Moreover, when the wire width and wire height are at or below the mean free path of a conduction electron, the increase in electrical resistivity becomes more prominent.
Since signal delay (RC delay) in a multilayer wire is a significant factor of deteriorating LSI performance, the increase in wire resistance is preferably suppressed as much as possible; however, the increase in electrical resistivity of a metal wire along with the miniaturization is an inevitable problem, and for solving the problem essentially, an alternative to the wire material is needed. The wire resistance of the metal wire is determined based on the electrical resistivity of the metal and its wire length; therefore, the RC delay is more serious particularly when the wire length is longer.